Nitride semiconductor devices have features, such as high saturated electron velocity and wide band gaps, and thus have been actively developed as high-voltage, high-power semiconductor devices. With respect to nitride semiconductor devices, many reports of field-effect transistors, in particular, high electron mobility transistors (HEMTs) have been published. In particular, AlGaN/GaN HEMTs including electron transit layers composed of GaN and electron supply layers composed of AlGaN have been attracting attention. For AlGaN/GaN HEMTs, the difference in lattice constant between GaN and AlGaN causes strain in AlGaN. The strain-induced piezoelectric polarization and the spontaneous polarization of AlGaN results in a high-density two-dimensional electron gas (2DEG), thereby achieving high breakdown voltage and high output power. AlGaN/GaN HEMTs have been attracting attention as semiconductor devices for use in power supplies and high-frequency amplifiers.
Nitride semiconductor devices, such as AlGaN/GaN HEMTs, include gate electrodes, source electrodes, and drain electrodes on nitride semiconductor layers including, for example, electron transit layers and electron supply layers. The gate electrodes, the source electrodes, and the drain electrodes are formed using what is called a lift-off process.
To form a source electrode and a drain electrode, a resist is applied on a nitride semiconductor layer and processed by lithography to form a resist mask having openings located at portions of the mask corresponding to portions of the layer where the source electrode and the drain electrode will be formed. For example, Ti/Al is used as an electrode material. Ti/Al is deposited by vapor evaporation or the like on the resist mask in such a manner that the openings are filled with Ti/Al. The resist mask and Ti/Al deposited on the mask are removed by the lift-off process. Then heat treatment of a substrate forms ohmic contacts. Thereby, the source electrode and the drain electrode are formed on the nitride semiconductor layer.
To form the gate electrode, the resist is applied on the nitride semiconductor layer and processed by lithography to form a resist mask having an opening located at a portion of the mask corresponding to a portion of the layer where the gate electrode will be formed. For example, Ni/Au is used as an electrode material. Ni/Au is deposited by vapor evaporation or the like on the resist mask in such a manner that the opening is filled with Ni/Au. The resist mask and Ni/Au deposited on the mask are removed by the lift-off process. Thereby, the gate electrode is formed between the source electrode and the drain electrode on the nitride semiconductor layer.
Japanese Unexamined Patent Application Publication No. 2008-270521 is an example of related art.